Automatic test pattern generation and memory BIST for high fault coverage manufacturing test.
Compact pattern sets with high coverage for static and delay fault models.
Configurable MBIST controllers and algorithms for on-chip memory test.
Clear metrics and residual fault analysis for manufacturing sign-off.
Industry-standard pattern formats for tester bring-up and production.
Register interest for ATPG and MBIST early access alongside Apertis DFT.