Multi-FPGA emulation and rapid prototyping platform for pre-silicon validation, supporting Lattice (iCE40, ECP5, Nexus), Xilinx (Artix-7, Spartan-7, UltraScale+), Intel (Cyclone V), Gowin, and NanoXplore FPGAs via open-source toolchains
Automated design partitioning across multiple FPGAs with interconnect optimization for large SoC designs.
Hardware-accelerated emulation running at MHz speeds with cycle-accurate behavior and real-time debug.
Non-intrusive signal capture with deep trace buffers for post-mortem analysis and waveform viewing.
Built-in cycle-accurate models for AXI, APB, UART, SPI, I2C, and Ethernet for full-system validation.
Turnkey FPGA prototyping flow with automated bitstream generation and deployment to Xilinx and Intel boards.
Integrated debug probes with trigger conditions, breakpoints, and real-time register inspection.
Full support for all nextpnr-supported architectures with automated synthesis, place-and-route, and bitstream generation
Ultra-low-power FPGAs via Project IceStorm. iCE40 UltraLite, iCE40 LP, HX (up to 8K LUTs).
High-performance FPGAs via Project Trellis. ECP5-5G with DSP blocks, SERDES, and DDR up to 85K LUTs.
Next-gen FPGAs via Project Oxide. Nexus CE/SC/LS families with embedded SerDes and high-speed I/O.
Gowin FPGAs via Project Apicula. GW1NR, GW2A, GW5A families with built-in DDR and SerDES.
Intel/Altera FPGAs via Project Mistral. Cyclone V SoC with ARM HPS integration.
Xilinx FPGAs via Project X-Ray. Artix-7, Kintex-7, Spartan-7 families with full bitstream support.
Xilinx high-performance FPGAs via RapidWright. Virtex UltraScale+ and Kintex UltraScale+ devices.
NanoXplore radiation-tolerant FPGAs for space and defense applications.
This product is under development. Contact us to join the early-access interest list.